Simulation method of digital circuits with faults

Vasyl Kulikov, Vitalii Kravchuk

Abstract


The simulation method of digital circuits applied to solving the problem of finding fault is not detected by the reaction scheme on the same input sequence signals (completeness check test). The method allows to build models of digital circuits that have better performance simulation speed compared with known methods. High speed simulation is achieved by bringing the process modeling operations successive logical multiplication and addition business fields, which contain all the necessary information about signals and malfunctions scheme.

Keywords: simulation method, digital circuits, malfunction.


References


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ISSN 2411-1031 (Print), ISSN 2518-1033 (Online)