KULIKOV, V.; KRAVCHUK, V. Simulation method of digital circuits with faults. Collection "Information Technology and Security", [S. l.], v. 3, n. 1, p. 50–59, 2015. DOI: 10.20535/2411-1031.2015.3.1.57722. Disponível em: https://its.iszzi.kpi.ua/article/view/57722. Acesso em: 21 nov. 2024.